Algorithms for FPGA Switch Module

We consider a switch module routing problem for symmetric array FPGAs. The work is motivated by two applications. The rst is that of eeciently evaluating switch module designs 9]. The second is that of evaluating the routability of global routing paths for a placement on this architecture. Only an approximate algorithm was previously known for this problem. In this paper, we present an optimal algorithm for the problem based on integer linear programming. Experimental results consistently show that our algorithm is very eecient for practical sized switch modules. We further improve this technique, by doing some pre-processing on the given switch module. We also identify interesting special cases of the problem which can be solved optimally in polynomial time.